Pulse-code modulation transmission systems



Juy 9' 1963 A. E. PINET ET AL 3,097,338

PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed Sept. 26, 1961 l@ Sheets-Sheet 1 msi .d v I II IIS... lllll I IQS i S J @E 2:3 @AEE all @S3332 msi HSHS S S il -MNHN HIIHH July 9, 1963 A. E. PINET Er AL 3,097,338

PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed Sew 26 1961 16 sheets-sheet 2 6J (H1/f1) i 16 {M000} E E 2 O 45 ff? 252 LEVELS July 9, 1963 A. E. PINET ET AL 3,097,338

PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed Sept. 26, 1961 16 Sheets-Sheet 3 July 9, 1963 A. E. PINET ETAL 3,097,338

PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed Sept. 26, 1961 16 Sheets-Sheet 4 65 (Hf/ff) 16 Sheets-Sheet 5 July 9, 1963 A. E. PINE-T ETAL PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed Sept. 2e, 1961 July 9, 1963 A. E. PINET ET AL PULSE-CODE MODULATION TRANSMISSION SYSTEMS 16 Sheets-Sheet 6 Filed Sept. 25, 1961 QQ b@ N@ JL @S m ma July 9, 1963 A. E. PINET ETAL PULSE-CODE MoDuLATIoN TRANSMISSION SYSTEMS Filed sept. 26, 1961 L6 Sheets-Sheet 7 July 9, 1963 A. E. PINET ETAL PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed sept. 2e, 1961 16 Sheets-Sheet 8 n@ a Q.

July 9, 1963 A. E. PINET ET AL 3,097,338

PULSE-CODE MoDULATIoN TRANSMISSION SYSTEMS Filed Sept. 26, 1961 16 Sheets-Sheet 9 July 9, 1963 A. E. PINET ETAL 3,097,338

PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed sept. 2e, 1961 16 Sheets-sheet 1ov S L .Q N w w S M N S .l VL WL VL T: l J 1 l j l i July 9, 1963 A. E. PINET ETAL PULSE-CODE MODULATION TRANSMISSION SYSTEMS 16 Sheets-Sheet l 1 Juy 9, 1963 A. E. PINET ET AL PULSE-CODE MODULATION TRANSMISSION SYSTEMS 16 Sheets-Sheet 13 Filed Sept. 26, 1961 July 9, 1963 A. E. PINET ETAL 3,097,338

PULSE-CODE MODULATION TRANSMISSION SYSTEMS l I l I l. L* h t mE- I Juy 9, 1963 A. E. PINI-:T ET AL PULSE-CODE: MODULATION TRANSMISSION SYSTEMS Filed Sept. 26. 1961 16 Sheets-Sheet l 5 `uly'9, 1963 A, E. PINET Erm. 3,097,338

PULSE-CODE MODULATION TRANSMISSION SYSTEMS Filed Sept. 26, 1961 16 Sheecs-Sl'xeerl 16 XN SSS @SQ United States Patent Olice 3,097,338 Patented July 9, 1963 PULSE-CODE MODULATION TRANSNUSSION SYSTEMS Andr Eugne Pinet, 22 Rue E. Le Gac, Perros-Guirec, Cotes du Nord, Saint-Maur, France, and Grard Battail, 30 Boulevard du Temple, Paris 11, France Filed Sept. 26, 1961, Ser. No. 140,895 Claims priority, application France Nov. 30, 1960 Claims. (Cl. S25-38) This invention relates to a pulse-code modulation transmission system of the kind wherein the value lof an information signal which it is required to transmit, such value being continuously variable in time, such signal hereinafter being referred to as a modulation signal, is periodically sampled, Whereafter the values of the samples thus provided are quantised-Le., replaced by the nearest whole-number multiple of a basic value known as the unit quantising level, and then -translated into coded groups of binary pulses. The modulation signals which it is required to transmit are, as a rule, of Zero mean value, as occurs with speech signals and the signals produced by frequency-division-multiplexing of speech signals. The samples therefore have a positive or negative characteristic. The term amplitude will denote hereinafter the absolute value of this characteristic.

It is known that the transmission quality of a pulsecode modulation transmission :system depends, inter alia, upon the ratio between the maximum amplitude of the Imodulation signal and the value `of the unit quantising level. Quality, of course, improves in proportion as the quantised signal, the value of which varies in time by level, differs more at any given time from a lesser quantity of the original modulation signal and therefore in proportion as such ratio is greater. The maximum instantaneous separation introduced by the quantising step between the modulation signal and the quantised signal is equal to half or less of `the unit quantising level if the quantising system has been appropriately selected,

Consequently, if the unit quantising sample has a constant value throughout the range of amplitudes of the samples to be encoded, transmission quality decreases momentarily when modulation signal amplitude decreases. The quantising level could, therefore, with advantage be made variable, its value increasing with the ampliude of the samples to be encoded.

Various systems have already been proposed to transmit, in the form of a sequence f code combinations, the sample Values quantised by a unit quantising level varying with sample amplitude. In some systems, the modulation signal is compressed before quantising and encoding and expanded after decoding. The unit quantising level is therefore continuously variable with arnplitude, and such systems have the `familiar disadvantage of continuous or analogue compression and expansion systems, connected with the diiculty of providing exactly complementary compression and expansion circuits-ie., such that a signal which has passed through the circuits in series is, at the output of such circuits, identical with its `original self.

ln a French Patent 1,261,253 to Andre Eugene Pinet, applied for on March 28, 1963, for a Pulse-code l:modulation transmission system, it Was proposed that the sign of the sample to be encoded be denoted by a binary digit and that the amplitude of the sample be encoded by the possible range of variation of modulation signal amplitude being subdivided into a number of partial ranges, known as encoding ranges, within which the unit quantising level has a constant value specific for each particular encoding range. The unit quantising level is therefore variable intermittently and in steps With the amplitude. Some sort of harmonisation can then be provided between, on the one hand, quantising and encoding, and, on the other hand, decoding, accuracy being similar to that of numerical transmission systems as cornpared with analogue transmission systems. In this earlier application the unit quantising level is an amplitude varying by a factor of two as between consecutive encoding ranges, and encoding takes the form of a series of 'divisions of the amplitude of each encoding range (or of the part occupied by the amplitude of the sample in the encoding range of highest order which is, as a rule, partly unoccupied) by the unit quantising level associated with such range, and of addition of the quotients of such divisions. Although the system described in this earlier application has proved satisfactory, the operation of dividing one voltage, representing the sample, by another voltage, representing the unit quantising level, cannot be performed readily and the system is fairly complicated.

Also known are encoding systems wherein periodic samplings of a modulation signal are converted into pulses of variable duration proportional to the value `of the corresponding sample, hereinafter referred to as sample pulses; and wherein the duration of the pulse is quantised and encoded by pulse counting. The number of counting pulses contained in a time interval equal to the duration of vthe sample pulse, such number being hereinafter called the code number, is equal to the quantised measurement of such duration taking as unit of time the interval between two counting pulses, such unit of time hereinafter being referred to as unit quantising duration. The counting pulses are applied to a binary counter which records the code number in its binary form, lhereinafter referred to as code combination; such combination is transmitted over a transmission channel in the form of binary pulses called code elements. In such `encoding systems the counting pulse generator is a fixed-frequency generator.

The transmission system according to the invention comprises an encoding system and a decoding system,

According to the invention, the amplitude of each sample is converted into a sample pulse of a duration proportional to the amplitude of the `original sample; such sample pulse operates an encoding system which is derived from the prior art system by the pulse counting generator being replaced by a iixedhfrequency pulse generator followed by an intermittent-frequency demultiplier comprising a number of binary demultipliers, the number thereof which are inserted between the `generator and the binary counter being controlled by an electronic selector switch controlled by the counter. At the start of counting no binary demultiplier is inserted. Immediately a particular code combination7 hereinafter called the transition code-combination, is briefly recorded in the binary counter during counting, the electronic selector switch inserts the first binary demultiplier into the chain of binary demultipliers forming the intermittent frequency demultiplier. Consequently, the period of the counting pulses is doubled and so the unit quantising duration is also doubled. The occurrence of other transition code combinations leads each time to the insertion of `one more binary demultiplier into the chain of binary demultipliers and therefore to a doubling of the previous period.

The compression pattern resulting can be illustrated graphically. lf the code number corresponding to a sample pulse is plotted along the ordinate, and the quantised measurement of such pulse is plotted along the abscissa (taking the unit quantising level as unit), the resultant points lie along a broken line formed by right segments, `the rst of which, of unit slope, stants from the origin, the second of which has a slope of 1/2 the third of a slope of t and so on. The points of connection of `such segments have as ordinates the transition code numbers and their abscissae will hereinafter 4be called encoding range limits.

The sign of the sample is transmitted as a code element added to the lcode combination representing the amplitude, as has just been stated.

The ydecoding system restores the amplitude lof the sample through the agency of a sample pulse, the duration Iof which is appropriately derived from the code number; to this end, the coding system comprises a counter which, having stored, the code combination for the received sample pulse, counts backwards from such number to Zero, disconnecting one more binary demultiplier whenever it passes through a transition code combination.

Of course, the sample pulse restored from its code combination must at the 4receiving end have a duration as close as possible to the duration of the original sample pulse-ie., the maximum difference between the original duration and the restored dluration must not exceed half the greatest unit quantising duration used at encoding. This accuracy depends upon the arrangement in time of the counting (or backward counting) pulse train rel-atively to the forward front of the (original or restored) sample pulse and relatively to the time of occurrence of a transition code combination; the encoding and decoding arrangements which can be used also Idepend one upon another (the conditions which had to be met because of this will hereinafter be briefly referred to as encodingdecoding correspondence conditions).

The invention therefore also relates to associated encoding and decoding lsystems providing desired compression patterns; for each such pattern there are a num'ber of pulse-counting systems and .a number of encodingdecoding correspondence conditions; iinally, a single such system and condition can be provided b y a number of means. Therefore many possible variants of the invention but all of them use common means appropriately adapted. To make such means readily apparent, a number of variants will be described, the description being limited:

With regard to compression patterns, first to a description of the invention as a whole, with provision for embodying three very simple Iand interesting compression patterns, then a more complicated system of use where the transition combinations are selected arbitrarily;

With regard to theY counting and backward counting pulse systems and the encoding-decoding correspondence conditions, to giving five possible patterns, land With regard to the effective embodiment of the lastmentioned patterns, to an exemplary description, in the vcase of an arbitrary but convenient choice of the factors hereinbefore mentioned, of how the systems previously describedywithout any reference to the requirements of restoration accuracy can meet the requirements of such accuracy inl the case of three of the tive patterns mentioned.

The invention will now be described in detail in accordance with the schedule just set forth, reference being made to the accompanying drawings wherein: i

FIGURE 1 illustrates a prior art system for encoding time-modulated pulses, using a constant unit quantising duration;

FIGURES 2, 4 and 6 illustrate intermittent compression patterns in which the transition code combinations are very simple binary numbers;

FIGURES 3, 5 and 7 illustrate encoding systems according to the invention wherein the compression patterns are those of FIGURES 2, 4'and 6 respectively; VFIGURE 8V illustrates an encoding system according to the` invention of'use where the transition code combinations are random;

FIGURE 9 illustrates a prior art. decoder for timemodulated pulses, the decoder operating by counting backwards and using a constant unit quantising duration;

FIGURE ltillus'trates a decoder according to the in- -ventionof use in association. with the encoder shown in FIGURE 3;

FIGURES 11-15 are diagrams showing the respective conditions of placing in time of the counting and back- Ward counting pulses, `of the forward front of the sample pulse, and of the times of occurrence of the transition code combinations, for the encoding-decoding correspondence conditions previously referred to;

FIGURE 16 illustrates a decoder in the event of the correspondence between encoding and decoding as shown in FIGURE 11;

FIGURE 17 is a diagram showing wave forms ofA signals at various places in the encoder. shown in FIGURE 3;

'FIGURE 18 is a diagram of wave forms of signals in various places of the decoder. shown in FIGURE 16;

FIGURES 19 and 20 show a shift network disposed in the decoder shown in FIGURE 16 and also show the wave forms of signals at various places in such network;

FIGURE 21 illustrates an encoder derived from the encoder shown in FIGURE 8 in the case of correspondence between encoding and decoding as shown in FIG- URE 13;

FIGURE 22 is a diagram of wave forms of signals at various places of the encoder shown in FIGUREZI;

FIGURE 23 illustrates a part of an encoder in the case of correspondence between encoding and decoding as shown in FIGURE 15;

FIGURE 24 is a diagram of wave forms of sign-als at various places in the encoder shown in FIGURE 23;

FIGURE 25 illustrates a part of a decoder in the case Y .of correspondence between encoding and` decoding as shown in FIGURE y15, and

FIGURE 26 is a diagram of wave forms of vsignals at various places in the decoder shown in FIGURE 25.v

FIGURE 1 illustrates a prior art encoder associated with a prior art circuit for signed detection and timemodulating pulses. The encoder comprises a sign-detecting and pulse-time-modulating circuit 1 having an input 101 to which are applied samples ofthe signal; to be encoded, the encoder also comprising: a counting pulse generator 3, a circuit 4 which in its simplest form is an and-gate circuit; a binary counter 5v formed by a cascaded network of flip-flops 50-55; a transfer or read-in circuit 6 formed by as many and-gate circuits 61E-65 as there are flip-flops in the counter 5 plus one, 66;; a transfer and zero-resetting pulse generator 7 for periodically opening all the and-gates I611-66 together and resetting the counter to zero; and a delay line 8 having as many connections -86, which are evenly spaced apartV from one another, as there are and-gates in the transfer circuit, such connection Ibeing connected to the outputs of such and-gates, the delay line being terminated at one end by a resistance 87 equal to its characteristic resistance and at the other end being connected to a transmission channel 2.

The prior art encoder 4as shown in FIGURE 1 operates as follows:

The and-gate 4 passes as many counting pulses produced by the generato-r 3 as the times which the period of such counting pulses is contained in the duration of the time-modulated pulse produced by the circuit 1. Such counting pulses are counted-by the counter 5 and at the completion of counting each flip-flop 5'0-5'5` is in a state representing the binary digit of the binary order, or weight corresponding to the rank of such flip-flop. The flip-ops 50-55 therefore store the binary digits or code elements of orders zero, one, two, three, four and live of the sample pulse code. At periodically recurring times corresponding to the transfer pulses produced by the transfer generator 7, the code elements are -applied in parallel to the delay line 8 and transmitted serially therethrough to the transmission channel 2.

The sign-detecting and pulse-time-modulation circuit 1 compri-ses: 'a sign-detecting circuit 102;,a sign flip-flop `56 which Iis `controlled by the sign-detecting circuit 102 and which takes up one or the other stateV depending upon whether the sign of the sample is positive or negative;

Yaniinvertiug amplier 103; two electronic switchesl 104,

105 respectively operated by the sign flip-hop '56 in the one and in the zero position; and the actual time modulator 106. It will be apparent that a positive sample is applied .to the time modulator 166 through the closed switch 104, and 'that the polarity of a negative sample is reversed in the inverting amplifier 103 and only after this reversal of polarity is the sample applied to the time modulator 106 through the closed switch 105. The time modulator 105 therefore receives a quantity of constant sign representing sample amplitude.

Of course, the delay line 8 can be replaced by means for sequentially opening the and-gates 60-66, in which case the outputs thereof are connected to the transmission channel 2 in parallel.

The encoder according to the invention is illustrated in FIGURE 3 for the case where the compression pattern is that shown in FIGURE 2. Elements which are the same as or similar to the elements shown in FIGURE 1 have the same references. Disposed between the counting pulse generator 3 and the and-gate circuit 4 is a frequency-demultiplying circuit 9 which divides the frequency of the generator 3 and which is controlled by the counter 5. As already explained in the opening part hereof, the variable quantising level, which is in this case the recurrence period of the output pulses of the demultiplier 9, must be rendered Variable by steps in dependence upon the duration of the sample pulse which is translated by the number marked by the counter 5.

The demultiplier 9, the demultiplication factor of which is variable in steps, is formed by a chain of a number of binary demoltiipliers arranged as counter, the number of binary demultipliers of the chain beting adapted to be varied through the agency of an electronic selector switch controlled by the counter 5. It is assumed in FIGURE 3 that the compression pattern is as in FIGURE 2 Where the encoding range limits have a duration of zero, sixteen, forty-eight, hundred and twelve and two hundred and thirty-two duration levels, and the transition code numbers are sixteen, thirty-two and forty-eight, the highest code number being, of course, sixty-three (the sixtyfour levels considered are numbered from Zero).

The frequency demultiplier 9 (FIG. 3) comprises a number of binary demultipliers 91 and an electronic selector switch 92 which ensures that the generator 3 can deliver operatively only to one of 'the four channels extending to terminals 920-923. The system 91 comprises three binary demultipliers 911-913 arranged as a binary counting chain, each demultiplier being formed by a symmetrically driven nip-flop. All three flip-flops are introduced between the generator `3 and the gating circuit 4, and a demultiplication factor of eight exists when the generator 3 is connected to terminal `923; only two are inserted, with a resultant demultiplication factor of four, if generator 3 is connected to terminal 922; and only one is inserted, with a resultant demultiplication factor of two, if generator 3 is connected to terminal 921; nally, no demultiplier is inserted, with a resuiltant demultiplication `factor of unity, if generator '3 is connected to terminal 920. The generator 3 is connected to terminals 920-923 through respective and-gates 936-933. Andgate `939 is open when the binary digits of binary orders ve and four of the counter 5 are 0 and O respectivelyi.e., up to the code number 16; and-gate 931 is open when the binary digits of the same two binary orders are 0 and 1 respectively-ie., `from code number 16 to code number 32: and-gate 932 is open when the binary digits are l and 0 respectively-i.e., from code number 32 to code number 48 and and-gate 933 is open when the binary digits are 1 and 1 respectively-i.e., from code number 48 to code number 63.

It will be apparent that code numbers O to 16 correspond to levels (l to 16, and code numbers 16 to 32 correspond to klevels 16 to 48; since in this encoding range the demultiplication factor is two. The code numbers 6 32 to 48 correspond to levels 48-112 since in this encoding range the demultiplication factor is four. Finally, the coding numbers 48 to 63 correspond to levels 112 to 232 since in this encoding range the demultiplication factor is eight.

The frequency demultiplier 9 becomes as 9 in FIG- URE 5 when the compression pattern is as shown in FIG- URE 4. There are three possible demultiplication factors: four, when binary demultipliers 911', 912' of chain 91' are both in operation (generator 3 connected to terminal 922') two, when only the binary demultiplier 911 is in operation (generator 3 connected to terminal 921') and only one, when no binary demultiplier is in operation (generator 3 connected to terminal 920'). The andgate 936' connecting the generator 3 to the terminal 920l is open when the binary digits of binary orders live and four of the counter 5 are O and 0 respectively; the andgate 931 connecting the generator 13 to the terminal 921 is open when the binary digits of binary orders live and four are 0 and 1 respectively; and the and-gate 932' connecting the generator 3 to the terminal 922 is open when the binary digit of binary order five is 1, whatever the binary digit of binary order four.

Clearly, the frequency demultiplier 9 shown in FIG- URE 5 provides a count of up to 16 with demultiplication by a factor of unity, counting from 16 to 48 being with a demultiplication `factor of two, While from fortyeight to hundred and seventy-two the demultiplication factor lis four.

The frequency demultiplier 9 becomes as 9" in FIG- URE 7 when the compression pattern is as shown in FIG- URE 6. There are three demultiplication factors-of four, when binary demultipliers 911", 912 of chain 91 are both in operation (generator 3 connected to terminal 922); of two, when only the binary demultiplier 911 is 4in operation (generator 3 connected to terminal 921); and of one, when no binary demultiplier is in operation (generator 3 connected to terminal 924V). The and-gate 930 which connects the generator 3 to the terminal 920" is open when the fifth-order binary digit is zero-ie., up to code number 32; the and-gate 931 which connects the generator 3 to the terminal 921 is open when the fifth and fourth-order binary digits are l and 0 respectivelyi.e. up to code number 48-and the gate circuit 932 connecting the generator 3 to the terminal 922" is open when the iifth and fourth-order binary digits are respectively l and 1-i.e., up to code number 63.

It will be apparent that, with the frequency demultiplier 9" shown in FiGURE 7, a count of up to 32 is possible with demultiplication by unity, a count from 32 to 64 is possible with demultiplication by a factor of 2, and a count from 64 to 124 is possible with demultiplication by a factor of four.

In FIGURE 8 a frequency demultiplier 29 is shown which is rather more complicated than the frequency demultipliers hereinbei'ore described and which is of use Where the transition code combinations are numerous and random and, unlike the examples described with reference to FIGURES 3, 5 and 7, are not characterised bythe binary value of the highest-order binary digit and of that which is of an immediately lower order.

It will be assumed that there are (n+1) llip-llops in the counter 5, the flip-flops being numbered 500, 501 and so one up to 50 and that `there are (p-{1) encoding ranges, and therefore p transition code combinations consisting of (n+1) binary digits (it will be assumed that zeros are placed to the left of the digit 1 of highest order so that the total number of binary digits of each transition code combination is (n4-1)). The frequency demultiplier 29 comprises a group 291 of p binary demultipliers 2911, 2912 and so on up to 291D, and an electronic selector switch 292 formed by (p-i-l) and-gate circuits 2930, 2931 and so on up to` 1293p the respective output terminals 2920, 2921 and so on up to 2921, of which are connected to the flip-flop of the group 291 just as in FIGURES 3, and 7. The inputs of the and-gates 2930 to 293p are not directly connected to the flip-flops 501, to 50n of the counter 5 a code combination translater 294 is provided between the counter 5 and the electronic selector Iswitch 292 and comprises a matrix 296 having 2 (n+1) lline wires grouped in (n-l-l) groups of two, each of the two wires of .a group corresponding the one to the digit zero and the other to the digit 1 of a desired binary order, and p(n+1) column wires grouped in p groups of (n+1). `In each group of (n+1) column wires, each wire is associated with a binary digit of a particular binary order and, if such digit is zero in the transition code combination of the same order as the group of (n+1) wires considered, it is connected to the line wire representing the digit 0 of the same order as the wire in the group, while if the digit is l, it is connected to the line wire representing the digit 1 of the same binary order as the wire in the group.

Each group of (n+1) column wires is connected to the inputs of gating circuits 2941 to 2941 the outputs of which are connected to Hip-flops 2951 to 2951,. Clearly, when the counter .passes through a transition code combination, one of the gating circuits 2941 to 2941, opens and that Vof ,the flip-flops 2951 to 2951, which corresponds to the opened gating circuit is placed in the one state.

The gating circuits 2930 to 293p receive the counting pulses at one of their inputs; also, each gating circuit 2931 to 2931, has an input connected to the output of the part representing the one state of that of the lip-flops :2951 to 2951, of the same order, and another inputV connected 4to the output of the part representing the zero state of that of the flip-flops 2951 to 2951, which is of an order greater by one unit. The gating circuit 2930 has merely one input connected to the output of the part representing the zero state of the flip-flop 2951. Consequently, the consecutive appearance of the transition code combinations brings the flip-flops 2951 to 295p into the one state consecutively in ascending order of indices; because of the connection described between the ilip-ops 2951 to 295D and the gating circuits 2930 to 2931 only one of the latter is open `at any given time. Since the gating circuit 2930 is open iat the beginning, the .appearance of each transition code combination leads to the opening of the gate having the index equal to the order of such combination and to the closure of the gate of immediately lower index, thus modifying the frequency demultiplier in accordance with the chosen compression pattern.

FIGURE 9 illustrates a decoder for restoring a sample pulse which it is assumed has been quantised with a constant level. Associated with the decoder is a system 11 for demodulating time-modulated pulses and for sign restoration. The complete system can therefore operate in association with the modulator shown in FIGURE 1. In `addition to the system 11, FIGURE 9 also shows a backward counting pulse generator 13, a circuit 14 which in its simplest form is an and-gate circuit, a binary counter 15 formed by a cascaded connection of ip-ilops 15G-155, a transferring or right-in circuit 16 formed by as many and-gate circuits 160-165 as there are Hip-flops in the counter 115 plus one and-gate 166, a transfer pulse generator 17 `adapted to open the and-gates 160-166 perilodically and together, `and a delay line 18 having as many connections 180-186, spaced evenly apart from one another, as there are and-gate circuits in the transfer c-ircuit, such connections being connected to the inputs of the and-gate circuits, the delay line being terminated at one end by a resistance 187 equal to its characteristic resistance and at the other end being connected to the transmission channel 2. The decoder also comprises an Iand-gate circuit 12 having as many inputs as there are ip-flops in the binary counter 15, such inputs being connected to the zero output of the binary counter flipops, plus one negating input connected to the transfer pulse generator 17, and a ltime ip-ilop disposed between the gating circuit 12 and the sign-detecting and demodulating circuit -11, flip-opping of the flip-flop 10 into the one state being controlled by the transfer pulse generator 17, while flip-Hopping into the zero state is controlled by the gating circuit 12. The same is arranged to detect the time when all the {lip-flops of the counter 15 are simultaneously in the zero state-ie., the time when the counter 15 marks zero.

Whereas the flip-flops 50-55 of the counter 5 were connected in cascade in the sense of increasing counting-ie., whereas, on the assumption that the flip-flops .considered are sensitive to signal fronts corresponding to a changeover from the one to the zero state, such -fronts being referred to hereinafter as negative fronts, the one output of a flip-flop of a given order being connected to fthe symmetricalv input of the ip-llop of immediately higher order-the flip-flops 1'50-155 of the counter 15 are connected in cascade in the sense of decreasing counting, the zero output of a `flip-flop of given order being connected at the symmetrical input of the flip-flop of immediately higher Iorder. A counter of this kind, sometimes called a backwards counter, is known in the art and, for information about it, reference may be made to the book entitled Pulse and Digital Circuits by I. Millman and H. Taub, McGraw-Hill Book Company ed. 1956, page 335, paragraph 11.6.

The decoder shown in FIGURE 9 operates as follows:

- The code elements, including the sign element, which are transmitted in series over the transmission channel 2 appear at Ieach cycle `at the terminals -186 of the delay line 18. At recurrent times corresponding to the transfer pulses produced by the transfer generator 17, the code elements are applied in parallel to the ilip-ilops 15G-155 through thegating circuits 160465; simultaneously, the sign element is applied to the sign Hip-flop 156 of the sign-restoring and demodulating circuit 11 through the gating circuit 166. The counter 15 behaves like a memory. The transfer pulse is applied to the one input of the time Vflip-flop 10 and also to the negating input of the gating circuit 12, the output of which actuates the zero input of the same flip-flop 10. The flip-flop 10' is therefore changed over to the one state. When the code elements have been stored in the counter 15, the backward counting pulse generator 13 is started, the generators 13 and 17 being synchronised as will be described hereinafter. These backward counting pulses pass through the gating circuit 14 which is open while the flip-flop 10' is in the one state and reduced to zero, unit by unit, the code combination stored in the counter 15 and representing the quantised measurement of the original sample pulse. When the counter .'15 has been reset to zero the gating circuit 12 Iopens so that the time ip-ilop 111' is returned to the zero state. It will be apparent that the ip-llop 10 has remained in the one state for a time equal or substantially equal to the duration of the sample pulse transmitted by the encoder in the form of code elements. The signal of the generator 13 is assumed to have a square wave form.

The pulse from the generator 17 must coincide with a half-period of the generator 13 so that the rear front of the pulse of the generator 17 appears simultaneously with the first of the backward counting pulses.

Consequently, if the code number received is Zero, the time flip-flop 10 returns to the zero state after a time equal to half the unit quantising duration. Assuming that the sign of the sample is correctly detected at transmission, even in the case of amplitudes less than half the quantising level, the restoration error is half or less of such level, an amount which is the required approximation.

The time Hip-flop 10 is connected to a circuit 1106 for demiodulating time-modulated pulses, the output of the circuit 1106 being connected to the output terminal yS1101 of the decoder through tWo paths, one such path comprising the electronic switch 1-104l and the other such path 

1. A CODED PULSE MODULATION TRANSMISSION SYSTEM COMPRISING: MEANS FOR PRODUCING SAMPLE PULSE TIME-MODULATED BY A MODULATION SIGNAL; A RECURRENT COUNTING PULSE GENERATOR; MEANS FOR VARYING IN MULTIPLES OF TWO THE FREQUENCY OF SUCH GENERATOR; MEANS FOR TRANSMITTING OVER A TRANSMISSION CHANNEL BINARY-CODE PULSES TRANSLATING THE NUMBER OF TIMES THAT THE PERIOD OF THE COUNTING PULSES IS CONTAINED IN THE DURATION OF A SAMPLE PULSE; A RECURRENT BACKWARD COUNTING PULSE GENERATOR; MEANS FOR VARYING IN MULTIPLES OF TWO THE FREQUENCY OF THE LAST-MENTIONED GENERATOR; AND MEANS FOR PRODUCING RESTORED SAMPLE PULSES, THE DURATION OF WHICH IS A NUMBER OF PERIODS OF THE BACKWARD COUNTING PULSES EQUAL TO THE NUMBER REPRESENTED BY THE BINARY-CODE PULSES, THE FREQUENCY OF THE COUNTING PULSES AND THE FREQUENCY OF THE BACKWARD COUNTING PULSES VARYING BY A MULTIPLE OF TWO WHEN THE GENERATORS HAVE PRODUCED PREDETERMINED NUMBERS OF COUNTING AND BACKWARD COUNTING PULSES. 